enc28j60.h

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// Copyright (c) 2020 Dalibor Drgon <dalibor.drgon@gmail.com>
// This code is licensed under MIT license (see LICENSE.txt for details)
#ifndef __ENC28J60_H
#define __ENC28J60_H

#include <stdint.h>
#include <stdbool.h>

#ifdef __cplusplus
extern "C" {
#endif

#define ENC28J60_ERRATA_INFO


/************************ enc28j60 registers start ***************************/

// Shared registers
#define ENC28J60_EIE              0x1B
#define ENC28J60_EIR              0x1C
#define ENC28J60_ESTAT            0x1D
#define ENC28J60_ECON2            0x1E
#define ENC28J60_ECON1            0x1F

// Bank #0
#define ENC28J60_ERDPTL           (0x00|0x00)
#define ENC28J60_ERDPTH           (0x01|0x00)
#define ENC28J60_EWRPTL           (0x02|0x00)
#define ENC28J60_EWRPTH           (0x03|0x00)
#define ENC28J60_ETXSTL           (0x04|0x00)
#define ENC28J60_ETXSTH           (0x05|0x00)
#define ENC28J60_ETXNDL           (0x06|0x00)
#define ENC28J60_ETXNDH           (0x07|0x00)
#define ENC28J60_ERXSTL           (0x08|0x00)
#define ENC28J60_ERXSTH           (0x09|0x00)
#define ENC28J60_ERXNDL           (0x0A|0x00)
#define ENC28J60_ERXNDH           (0x0B|0x00)
#define ENC28J60_ERXRDPTL         (0x0C|0x00)
#define ENC28J60_ERXRDPTH         (0x0D|0x00)
#define ENC28J60_ERXWRPTL         (0x0E|0x00)
#define ENC28J60_ERXWRPTH         (0x0F|0x00)
#define ENC28J60_EDMASTL          (0x10|0x00)
#define ENC28J60_EDMASTH          (0x11|0x00)
#define ENC28J60_EDMANDL          (0x12|0x00)
#define ENC28J60_EDMANDH          (0x13|0x00)
#define ENC28J60_EDMADSTL         (0x14|0x00)
#define ENC28J60_EDMADSTH         (0x15|0x00)
#define ENC28J60_EDMACSL          (0x16|0x00)
#define ENC28J60_EDMACSH          (0x17|0x00)

// Bank #1
#define ENC28J60_EHT0             (0x00|0x20)
#define ENC28J60_EHT1             (0x01|0x20)
#define ENC28J60_EHT2             (0x02|0x20)
#define ENC28J60_EHT3             (0x03|0x20)
#define ENC28J60_EHT4             (0x04|0x20)
#define ENC28J60_EHT5             (0x05|0x20)
#define ENC28J60_EHT6             (0x06|0x20)
#define ENC28J60_EHT7             (0x07|0x20)
#define ENC28J60_EPMM0            (0x08|0x20)
#define ENC28J60_EPMM1            (0x09|0x20)
#define ENC28J60_EPMM2            (0x0A|0x20)
#define ENC28J60_EPMM3            (0x0B|0x20)
#define ENC28J60_EPMM4            (0x0C|0x20)
#define ENC28J60_EPMM5            (0x0D|0x20)
#define ENC28J60_EPMM6            (0x0E|0x20)
#define ENC28J60_EPMM7            (0x0F|0x20)
#define ENC28J60_EPMCSL           (0x10|0x20)
#define ENC28J60_EPMCSH           (0x11|0x20)
#define ENC28J60_EPMOL            (0x14|0x20)
#define ENC28J60_EPMOH            (0x15|0x20)
#define ENC28J60_EWOLIE           (0x16|0x20)
#define ENC28J60_EWOLIR           (0x17|0x20)
#define ENC28J60_ERXFCON          (0x18|0x20)
#define ENC28J60_EPKTCNT          (0x19|0x20)

// Bank #2
#define ENC28J60_MACON1           (0x00|0x40|0x80)
#define ENC28J60_MACON2           (0x01|0x40|0x80)
#define ENC28J60_MACON3           (0x02|0x40|0x80)
#define ENC28J60_MACON4           (0x03|0x40|0x80)
#define ENC28J60_MABBIPG          (0x04|0x40|0x80)
#define ENC28J60_MAIPGL           (0x06|0x40|0x80)
#define ENC28J60_MAIPGH           (0x07|0x40|0x80)
#define ENC28J60_MACLCON1         (0x08|0x40|0x80)
#define ENC28J60_MACLCON2         (0x09|0x40|0x80)
#define ENC28J60_MAMXFLL          (0x0A|0x40|0x80)
#define ENC28J60_MAMXFLH          (0x0B|0x40|0x80)
#define ENC28J60_MAPHSUP          (0x0D|0x40|0x80)
#define ENC28J60_MICON            (0x11|0x40|0x80)
#define ENC28J60_MICMD            (0x12|0x40|0x80)
#define ENC28J60_MIREGADR         (0x14|0x40|0x80)
#define ENC28J60_MIWRL            (0x16|0x40|0x80)
#define ENC28J60_MIWRH            (0x17|0x40|0x80)
#define ENC28J60_MIRDL            (0x18|0x40|0x80)
#define ENC28J60_MIRDH            (0x19|0x40|0x80)

// Bank #3
#define ENC28J60_MAADR5           (0x00|0x60|0x80)
#define ENC28J60_MAADR6           (0x01|0x60|0x80)
#define ENC28J60_MAADR3           (0x02|0x60|0x80)
#define ENC28J60_MAADR4           (0x03|0x60|0x80)
#define ENC28J60_MAADR1           (0x04|0x60|0x80)
#define ENC28J60_MAADR2           (0x05|0x60|0x80)
#define ENC28J60_EBSTSD           (0x06|0x60)
#define ENC28J60_EBSTCON          (0x07|0x60)
#define ENC28J60_EBSTCSL          (0x08|0x60)
#define ENC28J60_EBSTCSH          (0x09|0x60)
#define ENC28J60_MISTAT           (0x0A|0x60|0x80)
#define ENC28J60_EREVID           (0x12|0x60)
#define ENC28J60_ECOCON           (0x15|0x60)
#define ENC28J60_EFLOCON          (0x17|0x60)
#define ENC28J60_EPAUSL           (0x18|0x60)
#define ENC28J60_EPAUSH           (0x19|0x60)

// PHY registers
#define ENC28J60_PHCON1           0x00
#define ENC28J60_PHSTAT1          0x01
#define ENC28J60_PHID1            0x02
#define ENC28J60_PHID2            0x03
#define ENC28J60_PHCON2           0x10
#define ENC28J60_PHSTAT2          0x11
#define ENC28J60_PHIE             0x12
#define ENC28J60_PHIR             0x13
#define ENC28J60_PHLCON           0x14

/************************ enc28j60 register flags start **********************/

// enc28j60 EIE Register flags
#define ENC28J60_EIE_INTIE        0x80
#define ENC28J60_EIE_PKTIE        0x40
#define ENC28J60_EIE_DMAIE        0x20
#define ENC28J60_EIE_LINKIE       0x10
#define ENC28J60_EIE_TXIE         0x08
#define ENC28J60_EIE_WOLIE        0x04
#define ENC28J60_EIE_TXERIE       0x02
#define ENC28J60_EIE_RXERIE       0x01

// enc28j60 EIR Register flags
#define ENC28J60_EIR_PKTIF        0x40
#define ENC28J60_EIR_DMAIF        0x20
#define ENC28J60_EIR_LINKIF       0x10
#define ENC28J60_EIR_TXIF         0x08
#define ENC28J60_EIR_WOLIF        0x04
#define ENC28J60_EIR_TXERIF       0x02
#define ENC28J60_EIR_RXERIF       0x01

// enc28j60 ESTAT Register flags
#define ENC28J60_ESTAT_INT        0x80
#define ENC28J60_ESTAT_LATECOL    0x10
#define ENC28J60_ESTAT_RXBUSY     0x04
#define ENC28J60_ESTAT_TXABRT     0x02
#define ENC28J60_ESTAT_CLKRDY     0x01

// enc28j60 ECON2 Register flags
#define ENC28J60_ECON2_AUTOINC    0x80
#define ENC28J60_ECON2_PKTDEC     0x40
#define ENC28J60_ECON2_PWRSV      0x20
#define ENC28J60_ECON2_VRPS       0x08

// enc28j60 ECON1 Register flags
#define ENC28J60_ECON1_TXRST      0x80
#define ENC28J60_ECON1_RXRST      0x40
#define ENC28J60_ECON1_DMAST      0x20
#define ENC28J60_ECON1_CSUMEN     0x10
#define ENC28J60_ECON1_TXRTS      0x08
#define ENC28J60_ECON1_RXEN       0x04
#define ENC28J60_ECON1_BSEL1      0x02
#define ENC28J60_ECON1_BSEL0      0x01

// enc28j60 ERXFCON Register flags
#define ENC28J60_ERXFCON_UCEN     0x80
#define ENC28J60_ERXFCON_ANDOR    0x40
#define ENC28J60_ERXFCON_CRCEN    0x20
#define ENC28J60_ERXFCON_PMEN     0x10
#define ENC28J60_ERXFCON_MPEN     0x08
#define ENC28J60_ERXFCON_HTEN     0x04
#define ENC28J60_ERXFCON_MCEN     0x02
#define ENC28J60_ERXFCON_BCEN     0x01

// enc28j60 MACON1 Register flags
#define ENC28J60_MACON1_LOOPBK    0x10
#define ENC28J60_MACON1_TXPAUS    0x08
#define ENC28J60_MACON1_RXPAUS    0x04
#define ENC28J60_MACON1_PASSALL   0x02
#define ENC28J60_MACON1_MARXEN    0x01

// enc28j60 MACON3 Register flags
#define ENC28J60_MACON3_PADCFG2   0x80
#define ENC28J60_MACON3_PADCFG1   0x40
#define ENC28J60_MACON3_PADCFG0   0x20
#define ENC28J60_MACON3_TXCRCEN   0x10
#define ENC28J60_MACON3_PHDRLEN   0x08
#define ENC28J60_MACON3_HFRMLEN   0x04
#define ENC28J60_MACON3_FRMLNEN   0x02
#define ENC28J60_MACON3_FULDPX    0x01

// EMC28J60 MACON4 Register flags
#define ENC28J60_MACON4_DEFER     0x40
#define ENC28J60_MACON4_BPEN      0x20
#define ENC28J60_MACON4_NOBKOFF   0x10

// enc28j60 MICMD Register flags
#define ENC28J60_MICMD_MIISCAN    0x02
#define ENC28J60_MICMD_MIIRD      0x01

// enc28j60 MISTAT Register flags
#define ENC28J60_MISTAT_NVALID    0x04
#define ENC28J60_MISTAT_SCAN      0x02
#define ENC28J60_MISTAT_BUSY      0x01

// enc28j60 PHY PHCON1 Register flags
#define ENC28J60_PHCON1_PRST      0x8000
#define ENC28J60_PHCON1_PLOOPBK   0x4000
#define ENC28J60_PHCON1_PPWRSV    0x0800
#define ENC28J60_PHCON1_PDPXMD    0x0100

// enc28j60 PHY PHSTAT1 Register flags
#define ENC28J60_PHSTAT1_PFDPX    0x1000
#define ENC28J60_PHSTAT1_PHDPX    0x0800
#define ENC28J60_PHSTAT1_LLSTAT   0x0004
#define ENC28J60_PHSTAT1_JBSTAT   0x0002

// enc28j60 PHY PHCON2 Register flags
#define ENC28J60_PHCON2_FRCLINK   0x4000
#define ENC28J60_PHCON2_TXDIS     0x2000
#define ENC28J60_PHCON2_JABBER    0x0400
#define ENC28J60_PHCON2_HDLDIS    0x0100

// enc28j60 PHY PHSTAT2 Register flags
#define ENC28J60_PHSTAT2_TXSTAT   0x2000
#define ENC28J60_PHSTAT2_RXSTAT   0x1000
#define ENC28J60_PHSTAT2_COLSTAT  0x0800
#define ENC28J60_PHSTAT2_LSTAT    0x0400
#define ENC28J60_PHSTAT2_DPXSTAT  0x0200
#define ENC28J60_PHSTAT2_PLRITY   0x0020

/************************ enc28j60 rxstatus flags start **********************/

// enc28j60 RX Buffer Status (enc28_60.rxstatus after enc28j60_readframe())
#define ENC28J60_RXSTATUS_LONGDROP_EVENT       (1<<0)
#define ENC28J60_RXSTATUS_CARRIER_EVENT        (1<<2)
#define ENC28J60_RXSTATUS_CRC_ERROR            (1<<4)
#define ENC28J60_RXSTATUS_LENGTH_CHECK_ERROR   (1<<5)
#define ENC28J60_RXSTATUS_LENGTH_OUT_OF_RANGE  (1<<6)
#define ENC28J60_RXSTATUS_RECEIVE_OK           (1<<7)

#define ENC28J60_RXSTATUS_RECEIVE_MULTICAST    (1<<8)
#define ENC28J60_RXSTATUS_RECEIVE_BROADCAST    (1<<9)
#define ENC28J60_RXSTATUS_DRIBBLE_NIBBLE       (1<<10)
#define ENC28J60_RXSTATUS_RECEIVE_CONTROL_FRAME       (1<<11)
#define ENC28J60_RXSTATUS_RECEIVE_PAUSE_CONTROL_FRAME (1<<12)
#define ENC28J60_RXSTATUS_RECEIVE_UNKNOWN_OPCODE      (1<<13)
#define ENC28J60_RXSTATUS_RECEIVE_VLAN_TYPE    (1<<14)
// Custom code added to indicate that the frame length exceeded max_length and thus got trimmed. 
#define ENC28J60_RXSTATUS_TRIMMED              (1<<15)

/************************ enc28j60 rxstatus flags start **********************/

// enc28j60 TX Buffer Status (shifted bit positions, stored in
// enc28j60_txstatus.status)
#define ENC28J60_TXSTATUS_GET_COLLISION_COUNT(status) (status & 0xf)
#define ENC28J60_TXSTATUS_CRC_ERROR            (1<<4)
#define ENC28J60_TXSTATUS_LENGTH_CHECK_ERROR   (1<<5)
#define ENC28J60_TXSTATUS_LENGTH_OUT_OF_RANGE  (1<<6)
#define ENC28J60_TXSTATUS_DONE                 (1<<7)
#define ENC28J60_TXSTATUS_MULTICAST            (1<<8)
#define ENC28J60_TXSTATUS_BROADCAST            (1<<9)
#define ENC28J60_TXSTATUS_PACKET_DEFER         (1<<10)
#define ENC28J60_TXSTATUS_EXCESSIVE_DEFER      (1<<11)
#define ENC28J60_TXSTATUS_EXCESSIVE_COLLISION  (1<<12)
#define ENC28J60_TXSTATUS_LATE_COLLISION       (1<<13)
#define ENC28J60_TXSTATUS_GIANT                (1<<14)
#define ENC28J60_TXSTATUS_UNDERRUN             (1<<15)

#define ENC28J60_TXSTATUS_CONTROL_FRAME        (1<<16)
#define ENC28J60_TXSTATUS_PAUSE_CONTROL_FRAME  (1<<17)
#define ENC28J60_TXSTATUS_BACKPRESSURE_APPLIED (1<<18)
#define ENC28J60_TXSTATUS_VLAN_TAGGED_FRAME    (1<<19)

// enc28j60 TX Packet Control Byte flags
#define ENC28J60_PKTCTRL_PHUGEEN   0x08
#define ENC28J60_PKTCTRL_PPADEN    0x04
#define ENC28J60_PKTCTRL_PCRCEN    0x02
#define ENC28J60_PKTCTRL_POVERRIDE 0x01

// SPI operation codes
#define ENC28J60_OP_READ_CTRL_REG       0x00
#define ENC28J60_OP_READ_BUF_MEM        0x3A
#define ENC28J60_OP_WRITE_CTRL_REG      0x40
#define ENC28J60_OP_WRITE_BUF_MEM       0x7A
#define ENC28J60_OP_BIT_FIELD_SET       0x80
#define ENC28J60_OP_BIT_FIELD_CLR       0xA0
#define ENC28J60_OP_SOFT_RESET          0xFF

/************************ enc28j60 macros start ******************************/

#define ENC28J60_MAX_FRAMELEN 1500
#define ENC28J60_MAX_FRAMELEN_ETH 1518

#define ENC28J60_MEMORY_SIZE 0x2000


/************************ enc28j60 structs start *****************************/

struct enc28j60;
typedef struct enc28j60 enc28j60;

typedef struct __attribute__((__packed__)) enc28j60_header {
    uint8_t opcode;
} enc28j60_header;

typedef struct __attribute__((__packed__)) enc28j60_ethernet_header {
    char dest[6];
    char src[6];
    uint16_t type;
    char data[0];
} enc28j60_ethernet_header;

typedef struct enc28j60_txstatus {
    uint32_t status;
    uint16_t transmit_byte_count;
    uint16_t total_bytes_transmitted;
} enc28j60_txstatus;

typedef void (*enc28j60_spi_callback)(
    enc28j60 *instance, 
    int custom_error_code
);

typedef struct enc28j60_init_struct {
    char mac_address[6];
    bool is_full_duplex;
    bool discard_crc_errors;
} enc28j60_init_struct;

/************************ enc28j60 current action start **********************/

#define ENC28J60_ACTION_TX (0b00)
#define ENC28J60_ACTION_TX_REG (0b10)
#define ENC28J60_ACTION_RX (0b01)
#define ENC28J60_ACTION_RX_REG (0b11)
#define ENC28J60_ACTION_IS_RX(action) ((action) & 0b01)
#define ENC28J60_ACTION_IS_REG(action) ((action) & 0b10)
#define ENC28J60_ACTION_SET_RX_POINTER (0b100)

#ifdef __DOXYGEN__
#include "enc28j60-struct.example.h"
#else
#include "enc28j60-struct.h"
#endif

/************************ enc28j60 functions start ***************************/

int enc28j60_blockingio(enc28j60 *ins, const char *tx, char *rx, unsigned length);

int enc28j60_ensurebank(enc28j60 *ins, uint8_t bank);

int enc28j60_io8(enc28j60 *ins, uint8_t op, uint8_t reg, uint8_t val, uint8_t *out);

int enc28j60_io16(enc28j60 *ins, uint8_t op, uint8_t reg, uint16_t val, uint16_t *out);

#if 0

int enc28j60_o8asynctry(enc28j60 *ins, uint8_t op, uint8_t reg, uint8_t val, enc28j60_spi_callback on_finish);

int enc28j60_o16asynctry(enc28j60 *ins, uint8_t op, uint8_t reg, uint16_t val, enc28j60_spi_callback on_finish);
#endif

int enc28j60_read8bitreg(enc28j60 *ins, uint8_t reg, uint8_t *content);

int enc28j60_write8bitreg(enc28j60 *ins, uint8_t reg, uint8_t content);

int enc28j60_clear8bitreg(enc28j60 *ins, uint8_t reg, uint8_t content);

int enc28j60_set8bitreg(enc28j60 *ins, uint8_t reg, uint8_t content);

int enc28j60_read16bitreg(enc28j60 *ins, uint8_t reg, uint16_t *content);

int enc28j60_write16bitreg(enc28j60 *ins, uint8_t reg, uint16_t content);

int enc28j60_clear16bitreg(enc28j60 *ins, uint8_t reg, uint16_t content);

int enc28j60_set16bitreg(enc28j60 *ins, uint8_t reg, uint16_t content);

int enc28j60_readphyreg(enc28j60 *ins, uint8_t reg, uint16_t *content);

int enc28j60_writephyreg(enc28j60 *ins, uint8_t reg, uint16_t content);

int enc28j60_readrevision(enc28j60 *ins, uint8_t *rev);

int enc28j60_softreset(enc28j60 *ins);

int enc28j60_init(enc28j60 *ins, enc28j60_init_struct *init);

int enc28j60_init_bank(enc28j60 *ins);

int enc28j60_init_mac(enc28j60 *ins, char mac_addr[6]);

int enc28j60_writewritepointer(enc28j60 *ins, uint16_t ptr);

int enc28j60_readwritepointer(enc28j60 *ins, uint16_t *ptr);

int enc28j60_writereadpointer(enc28j60 *ins, uint16_t ptr);

int enc28j60_readreadpointer(enc28j60 *ins, uint16_t *ptr);

int enc28j60_init_txbuffer(enc28j60 *ins, uint16_t start, uint16_t length);

#ifdef ENC28J60_HAS_ADVANCED_DRIVER

int enc28j60_write(enc28j60 *ins,
        uint16_t start_ptr, char *frame, uint16_t length, 
        enc28j60_spi_callback on_finish);
#else

int enc28j60_write(enc28j60 *ins,
        uint16_t start_ptr, enc28j60_header *frame, uint16_t length, 
        enc28j60_spi_callback on_finish);
#endif

#ifdef ENC28J60_HAS_ADVANCED_DRIVER

int enc28j60_writeframe(enc28j60 *ins, uint8_t control, 
        uint16_t start_ptr, char *frame, uint16_t length, 
        enc28j60_spi_callback on_finish);
#else

int enc28j60_writeframe(enc28j60 *ins, uint8_t control, 
        uint16_t start_ptr, enc28j60_header *frame, uint16_t length, 
        enc28j60_spi_callback on_finish);
#endif

int enc28j60_istx(enc28j60 *ins, bool *status);

int enc28j60_jointx(enc28j60 *ins);

int enc28j60_cleartxflags(enc28j60 *ins);

int enc28j60_transmitframe(enc28j60 *ins);

int enc28j60_aftertx(enc28j60 *ins);

int enc28j60_readtxstatus(enc28j60 *ins, uint16_t tx_start, uint16_t tx_length, enc28j60_txstatus *status);

void enc28j60_decrementretries(unsigned *remaining_tries);

bool enc28j60_shouldretransmit(enc28j60_txstatus *status, unsigned remaining_tries);

int enc28j60_transmitframeblocking(enc28j60 *ins,
        uint16_t start_ptr, uint16_t length);

#ifdef ENC28J60_HAS_ADVANCED_DRIVER

int enc28j60_read_try(enc28j60 *ins, char *frame, uint16_t length, enc28j60_spi_callback on_finish);
#else

int enc28j60_read_try(enc28j60 *ins, enc28j60_header *frame, uint16_t length, enc28j60_spi_callback on_finish);
#endif

#ifdef ENC28J60_HAS_ADVANCED_DRIVER

int enc28j60_read(enc28j60 *ins, uint16_t ptr, char *rx, uint16_t length, enc28j60_spi_callback on_finish);
#else

int enc28j60_read(enc28j60 *ins, uint16_t ptr, enc28j60_header *frame, uint16_t length, enc28j60_spi_callback on_finish);
#endif

int enc28j60_readrxframescount(enc28j60 *ins, uint8_t *cnt);

int enc28j60_init_rxbuffer(enc28j60 *ins, uint16_t start, uint16_t end);

#ifdef ENC28J60_HAS_ADVANCED_DRIVER

int enc28j60_readframe(enc28j60 *ins, char *frame, uint16_t max_length, enc28j60_spi_callback on_finish);
#else

int enc28j60_readframe(enc28j60 *ins, enc28j60_header *frame, uint16_t max_length, enc28j60_spi_callback on_finish);
#endif

int enc28j60_advancerxreadpointer(enc28j60 *ins);

int enc28j60_finishreadframe(enc28j60 *ins);

#ifdef ENC28J60_HAS_ADVANCED_DRIVER

int enc28j60_receiveframeblocking(enc28j60 *ins, char *frame, uint16_t max_length, enc28j60_tick timeout);
#else

int enc28j60_receiveframeblocking(enc28j60 *ins, enc28j60_header *frame, uint16_t max_length, enc28j60_tick timeout);
#endif

int enc28j60_enablerx(enc28j60 *ins);

int enc28j60_disablerx(enc28j60 *ins);

int enc28j60_discardcrcerrors(enc28j60 *ins, bool discard);

int enc28j60_enablemulticast(enc28j60 *ins, bool enable);

int enc28j60_enablebroadcast(enc28j60 *ins, bool enable);

#ifdef __cplusplus
}
#endif

#endif /* __ENC28J60_H */